In recent years, lower power consumption has become a very important issue for processor systems. Generally, volatile memories are used for cache memories of currently used processor systems. It is a problem for this type of processor system that data on cache memories vanish when power supply to the cache memories is cut off while the processor system is in operation. Therefore, when there is a data request, it is required to read out data from a higher level memory than the cache memories, which causes a longer reading time, leading to performance degradation. Because of this, power has to be continuously supplied to the entire processor system including the cache memories while a core of the processor system is in operation.
The standby power consumption of non-volatile memories is lower than that of volatile memories. Therefore, the non-volatile memories may be used as secondary or higher-level cache memories of a processor for further lower power consumption. Cache memories using non-volatile memories have a feature of an extremely short recovery time compared to volatile memories because the non-volatile memories do not lose data even if power is down. The access interval is long for especially the secondary or higher-level cache memories even if the processor is in operation. Therefore, the secondary or higher-level cache memories have many non-operating periods. However, the conventional processor systems perform power control based on power management by an operating system, and hence the processor cannot perform power management only for the cache memories based on judgment of the processor while the processor is in operation.